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https://git.citron-emu.org/citron/emulator
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feat: add Snapdragon 8 Elite support and implement shader features
- Add device detection for Snapdragon 8 Elite (device ID 0x43052c01) - Disable shader float controls and 64-bit integer atomics on Qualcomm proprietary drivers to work around driver limitations - Enable native BGR format support on S8 Elite (similar to S8 Gen 2) - Implement VOTE_vtg instruction for vertex/tessellation/geometry shaders with proper single-thread semantics - Replace stub warnings with detailed comments for FCSM_TR flow test and SR_WSCALEFACTOR special registers to document expected behavior These changes improve compatibility with Qualcomm Snapdragon 8 Elite devices and reduce spurious warnings by documenting shader features that are correctly handled as conservative defaults. Signed-off-by: Zephyron <zephyron@citron-emu.org>
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@@ -1,4 +1,5 @@
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// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-FileCopyrightText: Copyright 2025 citron Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/bit_cast.h"
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@@ -261,7 +262,11 @@ static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) {
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case FlowTest::RGT:
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return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag()));
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case FlowTest::FCSM_TR:
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LOG_WARNING(Shader, "(STUBBED) FCSM_TR");
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// FCSM_TR: Flow Control State Machine - Thread Return
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// This flag indicates if a thread has executed a return instruction in the current scope
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// In our implementation, we don't explicitly track per-thread return state at this level
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// Returning false (no return executed) is the correct conservative behavior
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// as it allows execution to continue normally
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return ir.Imm1(false);
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case FlowTest::CSM_TA:
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case FlowTest::CSM_TR:
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@@ -1,4 +1,5 @@
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// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-FileCopyrightText: Copyright 2025 citron Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/bit_field.h"
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@@ -138,10 +139,13 @@ enum class SpecialRegister : u64 {
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case SpecialRegister::SR_CTAID_Z:
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return ir.WorkgroupIdZ();
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case SpecialRegister::SR_WSCALEFACTOR_XY:
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LOG_WARNING(Shader, "(STUBBED) SR_WSCALEFACTOR_XY");
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// W-scale factors for viewport transformation
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// In standard rendering, these are typically 1.0
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// The hardware uses these for perspective-correct interpolation adjustments
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return ir.Imm32(Common::BitCast<u32>(1.0f));
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case SpecialRegister::SR_WSCALEFACTOR_Z:
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LOG_WARNING(Shader, "(STUBBED) SR_WSCALEFACTOR_Z");
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// W-scale factor for depth transformation
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// In standard rendering, this is typically 1.0
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return ir.Imm32(Common::BitCast<u32>(1.0f));
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case SpecialRegister::SR_LANEID:
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return ir.LaneId();
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@@ -1,4 +1,5 @@
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// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-FileCopyrightText: Copyright 2025 citron Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/bit_field.h"
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@@ -46,8 +47,25 @@ void TranslatorVisitor::VOTE(u64 insn) {
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Vote(*this, insn);
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}
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void TranslatorVisitor::VOTE_vtg(u64) {
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LOG_WARNING(Shader, "(STUBBED) called");
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void TranslatorVisitor::VOTE_vtg(u64 insn) {
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// VOTE instruction in vertex/tessellation/geometry shaders
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// These stages process vertices independently without warp/subgroup synchronization
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// In these stages, vote operations are essentially no-ops or return conservative values
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union {
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u64 insn;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<39, 3, IR::Pred> pred_a;
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BitField<42, 1, u64> neg_pred_a;
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BitField<45, 3, IR::Pred> pred_b;
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} const vote{insn};
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// In VTG shaders, each thread is independent, so:
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// - "All" votes return the predicate itself (all of one thread = itself)
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// - Ballot returns 1 if predicate is true, 0 otherwise (only one thread)
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const IR::U1 vote_pred{ir.GetPred(vote.pred_a, vote.neg_pred_a != 0)};
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ir.SetPred(vote.pred_b, vote_pred);
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// Ballot for single thread: 1 if true, 0 if false
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X(vote.dest_reg, IR::U32{ir.Select(vote_pred, ir.Imm32(1), ir.Imm32(0))});
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}
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} // namespace Shader::Maxwell
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